SK hynix reports 10 to 20 times throughput from 3D FeNAND compute-in-memory

Compared to conventional 3D arrays, SK hynix's optimized architecture for analog compute-in-memory using 3D FeNAND yielded a throughput that was about 10 to 20 times higher, according to the company.² The comparison held chip area constant, while the reported energy-efficiency advantage was around 4,000 to 5,000 times.² These are the company’s reported results for a research architecture, not figures describing a launched commercial product.² The work was published in the 2025 IEEE International Electron Devices Meeting, and its authors were Won-Tae Koo and Jihun Kim, identified as Technical Leader, Global RTC, SK hynix.² The size of the reported gains is tied to a combined design approach: the company attributes them to 3D FeNAND’s integration density and to reduced data movement.²

The problem the research addresses is the cost of repeatedly transferring data in expanding AI systems, where moving information can add both power use and delay.² Compute-in-memory seeks to limit those transfers by carrying out processing within memory, or near it, rather than continually sending information to separate computing devices.² In the analog form studied here, calculations take place inside memory using electrical states held in its cells.² Those states support multiply-and-accumulate operations, a type of calculation used in AI computation.² IT之家 likewise described A-CiM as performing such operations in memory through analog signals, and said reducing transfers can improve speed and energy efficiency.¹

The storage challenge is linked to AI models’ use of weight data: SK hynix says large volumes must be stored and accessed again and again.² That repeated access makes high-density memory important to the company’s account of A-CiM, because the weights need to reside in storage while being used for computation.² Conventional commercial 3D NAND chiefly relies on charge trap nitride, a material layer that changes cell states by trapping or releasing electrons.² SK hynix says this approach can provide density, but that advantage does not solve the difficulty of distinguishing the multiple current levels analog operations require.² IT之家 also set out the contrast between conventional charge-trap nitride and FeNAND’s ferroelectric basis.¹

FeNAND controls cell current through changes in a ferroelectric material’s electrical condition.² That material can retain its polarization after the external electric field that changed it is no longer applied.² SK hynix says these ferroelectric properties can make it easier to set several current levels accurately, while using less power than conventional 3D CTN NAND.² The company also says a single FeNAND cell can produce multiple current states, a feature it considers appropriate for storing AI weight data.¹ The proposed advantage is therefore not simply that FeNAND stores information differently, but that its current states may better serve analog computation.¹²

The paper does not treat a change to the memory cell as sufficient on its own.² SK hynix points to power lost in interconnects and to inefficient use of pages as constraints that can hold back performance.² Its research calls for improving control of cell current levels, the switching burden on word lines, and the way pages are used.² Rather than presenting these as isolated fixes, the paper optimizes the cell, non-cell and page schemes together for 3D FeNAND-based A-CiM.² This coordinated design is the basis for interpreting the reported performance comparison; the supplied account gives its numerical ranges for the same-area comparison, while IT之家 provides a qualitative explanation of A-CiM’s benefits.²

The page scheme concerns how computation data is laid out: the research arranges it into sequences and units intended to avoid needless switching.² That data arrangement is one part of the wider optimization, alongside the memory-cell and non-cell schemes described in the paper.² The company reports that applying the combined approach raised both computational throughput and energy efficiency in 3D FeNAND-based A-CiM.² The reported comparison is against conventional 3D arrays and fixes chip area, so it describes performance under that stated area constraint rather than an unconstrained comparison.² The throughput range and the energy-efficiency range measure different outcomes, and the supplied account reports both rather than treating one as a substitute for the other.²

The announcement is a research result, not a statement that a commercial product has been launched.² SK hynix’s paper appeared at the 2025 IEEE International Electron Devices Meeting, while the supplied newsroom pages carry an October 14, 2026 publication date.² The company's announcement of the research is therefore dated for the year after the conference where the paper was presented.² Five further supplied newsroom pages display the same research headline and October 14, 2026 date, so those entries repeat the same publication information rather than establishing separate research results.² IT之家 reported on October 15 that SK hynix had disclosed the research and that the work had appeared in an IEEE paper; the supplied account does not attach a year to that date.¹

The company’s explanation connects the engineering choices to a broader demand: AI models require large stores of weights that are accessed repeatedly.² In that setting, high-density storage matters because computation-in-memory depends on keeping data available within or near the memory where processing occurs.² The study’s approach combines the density of three-dimensional FeNAND with changes intended to limit transfers, switching and page inefficiency.² SK hynix reports improvements in throughput and energy efficiency from that combined design, while the supplied material does not describe a product launch.² The result presented is thus a research comparison under a stated chip-area condition, with its reported benefits attributed to both memory integration and less data movement.²